Time Barbie Tootle Hayes Cape Cartoon Room I Cartoon Room II Suzanne M. Scharer Rosa M. Ailabouni Monday Aug 5th, 2013 10:10-11:50 A1L-A Analog Circuits I Chr: Ming Gu, Shantanu Chakrabartty Track: Analog and Mixed Signal Integrated Circuits A1L-B Low Power Digital Circuit Design Techniques A1L-C Chr: Joanne Degroat Student Contest I Track: Digital Integrated Chr: Mohammed Ismail Circuits, SoC and NoC Track: INVITED ONLY A1L-D Design and Analysis for Power Systems and Power Electronics Chr: Hoi Lee, Ayman Fayed Track: Power Systems and Power Electronics A1L-E Design and Analysis of Linear and Non-Linear Systems Chr: Samuel Palermo Track: Linear and Non-linear Circuits and Systems A1L-F Emerging Technologues Chr: Khaled Salama Track: Emerging Technologies Monday Aug 5th, 2013 13:10-14:50 A2L-A Analog Circuits II Chr: Ming Gu, Shantanu Chakrabartty Track: Analog and Mixed Signal Integrated Circuits A2L-B Low Power VLSI Design Methodology Chr: Genevieve Sapijaszko Track: Digital Integrated Circuits, SoC and NoC A2L-C Student Contest II Chr: Sleiman Bou-Sleiman Track: INVITED ONLY A2L-D Power Management and Energy Harvesting Chr: Ayman Fayed, Hoi Lee Track: Power Management and Energy Harvesting A2L-E Oscillators and Chaotic Systems Chr: Samuel Palermo, Warsame Ali Track: Linear and Non-linear Circuits and Systems A2L-F Bioengineering Systems Chr: Khaled Salama Track: Bioengineering Systems and Bio Chips A4L-A Analog Design Techniques I Chr: Dong Ha Track: Analog and Mixed Signal Integrated Circuits A4L-B Imaging and Wireless Sensors Chr: Igor Filanovsky Track: Analog and Mixed Signal Integrated Circuits A4L-C Special Session: Characterization of Nano Materials and Circuits Chr: Nayla El-Kork Track: SPECIAL SESSION A4L-D Special Session: Power Management and Energy Harvesting Chr: Paul Furth Track: SPECIAL SESSION A4L-E Communication and Signal Processing Circuits Chr: Samuel Palermo Track: Linear and Non-linear Circuits and Systems A4L-F Sensing and Measurement of Biological Signals Chr: Hoda Abdel-Aty-Zohdy Track: Bioengineering Systems and Bio Chips B2L-A Analog Design Techniques II Chr: Valencia Koomson Track: Analog and Mixed Signal Integrated Circuits B2L-B VLSI Design Reliability Chr: Shantanu Chakrabartty, Gursharan Reehal Track: Digital Integrated Circuits, SoC and NoC B2L-D B2L-C Special Session: University and Delta-Sigma Modulators Industry Training in the Art of Chr: Vishal Saxena Electronics Track: Analog and Mixed Signal Chr: Steven Bibyk Integrated Circuits Track: SPECIAL SESSION B2L-E Radio Frequency Integrated Circuits Chr: Nathan Neihart, Mona Hella Track: RFICs, Microwave, and Optical Systems B2L-F Bio-inspired Green Technologies Chr: Hoda Abdel-Aty-Zohdy Track: Bio-inspired Green Technologies B3L-A Analog Design Techniques III Chr: Valencia Koomson Track: Analog and Mixed Signal Integrated Circuits B3L-B VLSI Design, Routing, and Testing Chr: Nader Rafla Track: Programmable Logic, VLSI, CAD and Layout B3L-C Special Session: High-Precision and High-Speed Data Converters I Chr: Samuel Palermo Track: SPECIAL SESSION B3L-D B3L-E Special Session: Advancing the RF/Optical Devices and Circuits Frontiers of Solar Energy Chr: Mona Hella, Nathan Neihart Chr: Michael Soderstrand Track: RFICs, Microwave, and Track: SPECIAL SESSION Optical Systems B5L-A Nyquist-Rate Data Converters Chr: Vishal Saxena Track: Analog and Mixed Signal Integrated Circuits B5L-B Digital Circuits Chr: Nader Rafla Track: Programmable Logic, VLSI, CAD and Layout B5L-C Special Session: High-Precision and High-Speed Data Converters II Chr: Samuel Palermo Track: SPECIAL SESSION B5L-D Special Session: RF-FPGA Circuits and Systems for Enhancing Access to Radio Spectrum (CAS-EARS) Chr: Arjuna Madanayake, Vijay Devabhaktuni Track: SPECIAL SESSION B5L-E B5L-F Analog and RF Circuit Memristors, DG-MOSFETS and Techniques Graphine FETs Chr: Igor Filanovsky Chr: Reyad El-Khazali Track: Analog and Mixed Signal Track: Nanoelectronics and Integrated Circuits Nanotechnology C2L-A Phase Locked Loops Chr: Chung-Chih Hung Track: Analog and Mixed Signal Integrated Circuits C2L-B Computer Arithmetic and Cryptography Chr: George Purdy Track: Programmable Logic, VLSI, CAD and Layout C2L-C Special Session: Reversible Computing Chr: Himanshu Thapliyal Track: SPECIAL SESSION C2L-D Special Session: Self-healing and Self-Adaptive Circuits and Systems Chr: Abhilash Goyal, Abhijit Chatterjee Track: SPECIAL SESSION C2L-E Digital Signal Processing-Media and Control Chr: Wasfy Mikhael, Steven Bibyk Track: Digital Signal Processing C2L-F Advances in Communications and Wireless Systems Chr: Sami Muhaidat Track: Communication and Wireless Systems C3L-A SAR Analog-to-Digital Converters Chr: Vishal Saxena Track: Analog and Mixed Signal Integrated Circuits C3L-B Real Time Systems Chr: Brian Dupaix, Abhilash Goyal Track: System Architectures C3L-C Image Processing and Interpretation Chr: Annajirao Garimella Track: Image Processing and Multimedia Systems C3L-D Special Session: Verification and Trusted Mixed Signal Electronics Development Chr: Greg Creech, Steven Bibyk Track: SPECIAL SESSION C3L-E Digital Signal Processing I Chr: Ying Liu Track: Digital Signal Processing C3L-F Wireless Systems I Chr: Sami Muhaidat Track: Communication and Wireless Systems C5L-A Wireless Systems II Chr: Sami Muhaidat Track: Communication and Wireless Systems C5L-B System Architectures Chr: Swarup Bhunia, Abhilash Goyal Track: System Architectures C5L-C Image Embedding Compression and Analysis Chr: Annajirao Garimella Track: Image Processing and Multimedia Systems C5L-D Low Power Datapath Design Chr: Wasfy Mikhael Track: Digital Integrated Circuits, SoC and NoC C5L-E Digital Signal Processing II Chr: Moataz AbdelWahab Track: Digital Signal Processing C5L-F Advances in Control Systems, Mechatronics, and Robotics Chr: Charna Parkey, Genevieve Sapijaszko Track: Control Systems, Mechatronics, and Robotics Monday Aug 5th, 2013 16:00-17:40 Tuesday Aug 6th, 2013 10:10-11:50 Tuesday Aug 6th, 2013 13:10-14:50 Tuesday Aug 6th, 2013 16:00-17:40 Wednesday Aug 7th, 2013 10:10-11:50 Wednesday Aug 7th, 2013 13:10-14:50 Wednesday Aug 7th, 2013 16:00-17:40 B3L-F Carbon Nanotube-based Sensors and Beyond Chr: Nayla El-Kork Track: Nanoelectronics and Nanotechnology 5
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Clustering • NI/ESI R01 applications will be clustered together in review. ESI applications will not be separately clustered within the NI\ESI group. o NI/ESI applications will be identified for reviewers so there can be appropriate review in context of career stage. o Expectations of preliminary data and publication track record less than for established investigators.
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Implementation of ESI definition (cont’d) • Applications from ESIs and New Investigators are identified to reviewers so that appropriate consideration of their career stage can be applied during review. • Applications from ESIs and New Investigators are “clustered” during review to enable evaluation as a group and distinguish from Established Investigators. • An application with more than one Principal Investigator is identified for consideration of ESI/NI by reviewers only if ALL of the listed Principal Investigators qualify as New Investigators. • Staff in the NIH institutes and centers are apprised of ESI and New Investigator status and this factor is considered when applications are selected for award. • New Investigators are eligible for the “Full Implementation to Shorten the Review Cycle for New Investigator R01 Applications Reviewed in Center for Scientific Review (CSR) Recurring Study Sections”. ( http://grants.nih.gov/grants/guide/notice-files/NOT-OD-07-083.html ) 9
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24 Functions are not Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods are are are are are are are are are are are are are are are are are are are are are are are are not not not not not not not not not not not not not not not not not not not not not not not not Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods are are are are are are are are are are are are are are are are are are are are are are are are not not not not not not not not not not not not not not not not not not not not not not not not Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods F are are are are are are are are are are are are are are are are are are are are are are are are not not not not not not not not not not not not not not not not not not not not not not not not Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods Methods are are are are are are are are are are are are are are are are are are are are are are are are not not not not not not not not not not not not not not not not not not not not not not not not Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions Functions
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Which Connections Are Open on a Host? Apples-MacBook-Pro:~ rigrazia$ netstat Active Internet connections Proto Recv-Q Send-Q Local Address tcp4 0 0 10.0.0.108.54500 tcp4 0 0 10.0.0.108.54485 tcp6 0 0 2601:9:6800:1e6:.54455 tcp6 0 0 2601:9:6800:1e6:.54419 tcp6 0 0 2601:9:6800:1e6:.54400 tcp4 0 0 10.0.0.108.54385 tcp4 0 0 10.0.0.108.54368 tcp6 0 0 2601:9:6800:1e6:.54297 tcp4 0 0 10.0.0.108.53964 tcp4 0 0 10.0.0.108.53939 tcp4 0 0 10.0.0.108.53913 tcp4 0 0 10.0.0.108.53836 tcp4 0 0 localhost.49961 tcp4 0 0 localhost.53264 tcp4 0 0 localhost.49961 tcp4 0 0 localhost.53263 tcp4 0 0 10.0.0.108.52960 tcp4 0 0 10.0.0.108.50737 tcp4 0 0 10.0.0.108.62510 tcp4 0 0 10.0.0.108.62508 Foreign Address a184-51-102-51.d.http g1.v.fwmrm.net.http nuq05s01-in-x11..https edge-star6-shv-0.https 2001:559:0:54::6.https a184-51-102-42.d.http a184-84-222-181..macro nuq05s02-in-x01..https valiente.cabrill.ssh valiente.cabrill.ssh gw094.lphbs.com.http 68.71.212.186.http localhost.53264 localhost.49961 localhost.53263 localhost.49961 channelproxy-shv.https boris.cabrillo.e.imaps boris.cabrillo.e.imaps boris.cabrillo.e.imaps (state) ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED CLOSE_WAIT ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED ESTABLISHED  Sometimes it is necessary to know which active TCP connections are open and running on a networked host.  Netstat is a network utility that can be used to verify those connections.  It lists the protocol in use, the local address and port number, the foreign address and port number, and the state of the connection. 67
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New Investigators/Early Stage Investigators • New Investigator (NI): PD/PI who has not yet competed successfully for a substantial NIH research grant o For multiple PD/PIs-all PD/PIs must meet requirements for NI status • Early Stage Investigator (ESI): PD/PI who qualifies as a New Investigator AND is within 10 years of completing the terminal research degree or is within 10 years of completing medical residency (or equivalent) • • Applies only to R01 applications New Investigators/Early Stage Investigators will be clustered together for review 22
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Institutional K vs. Independent K vs. R01 Institutional K • • • • • Highest probability of funding Your previous track record can be slim Limited research funding Can get an independent K or R01 later Requires annual update of information & competitive renewal after 2nd year Independent K • • • • • Higher probability of funding (vs. R01) Your previous track record can be slim Limited research funding Can get an R01 later Requires NCR yearly R01 • • • • • More difficult to get funding Rating depends in part on PI experience No limit on research funding Cannot get a K later Requires NCR yearly
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Activity 4: Data Governance Maturity Model Data Governance Level 1 Level 2 Level 3 Level 4 Level 5 Informal Developing Adopted and Implemented Managed and Repeatable Integrated and Optimized Attention to Data Governance is informal and incomplete. There is no formal governance process. Data Governance Program is forming with a framework for purpose, principles, structures and roles. Culture Limited awareness about the value of dependable data. General awareness of the data issues and needs for business decisions. Data Quality Limited awareness that data quality problems affect decision-making. Data cleanup is ad hoc. General awareness of data Data issues are captured quality importance. Data quality proactively through standard data procedures are being developed. validation methods. Data assets are identified and valuated. Expectations for data quality are actively monitored and remediation is automated. Data quality efforts are regular, coordinated and audited. Data are validated prior to entry into the source system wherever possible. Communication Information regarding data is limited through informal documentation or verbal means. Written policies, procedures, data Data standards and policies are standards and data dictionaries communicated through written may exist but communication and policies, procedures and data knowledge of it is limited. dictionaries. Data standards and policies are completely documented, widely communicated and enforced. All employees are trained and knowledgeable about data policies and standards and where to find this information. Roles & Responsibilities Roles and responsibilities for data management are informal and loosely defined. Expectations of data ownership and valuation of data are clearly defined. Roles, responsibilities for data governance are well established and the lines of accountability are clearly understood. Roles and responsibilities for data management are forming. Focus is on areas where data issues are apparent. Data Governance structures, roles and processes are implemented and fully operational. Data Governance structures, roles and processes are managed and empowered to resolve data issues. Data Governance Program functions with proven effectiveness. Data is viewed as a critical, There is active participation and shared asset. There is Data governance structures acceptance of the principles, widespread support, and participants are integral structures and roles required to participation and endorsement to the organization and implement a formal Data of the Data Governance critical across all functions. Governance Program. Program. Roles and responsibilities are well-defined and a chain of command exists for questions regarding data and processes. 49
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